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R1EX24064AxxS0A
Timing Waveforms
Bus Timing
t F
t HIGH
1/f SCL
t LOW
t R
SCL
t SU.STA
t HD.STA
t HD.DAT
t SU.DAT
t SU.STO
SDA
(in)
SDA
(out)
t SU.WP
WP
Write Cycle Timing
t AA
t DH
t HD.WP
t BUF
SCL
Stop condition
Start condition
SDA
D0 in
t WC
Write data
ACK
(Internally controlled)
(Address (n))
REJ03C0332-0200 Rev.2.00 Oct. 26, 2009
Page 6 of 22
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